Theme:Autonomous Vehicle Driving Competition using FPGA



Today, multiple companies are tackling the development of an autonomous vehicle of level 5 autonomous driving, i.e., an autonomous vehicle that can drive itself autonomously without a driver. The present autonomous driving technology relies on GPS functions, maps, and sensors. However, an autonomous vehicle of level 5 autonomous driving must take responsibility for protecting a human life. For that reason, such an autonomous vehicle is required to bear decision-making capability and image recognition capability approximating that of a typical human driver as a multiplex safety technology. Nevertheless, real time image recognition is difficult on an embedded system based on existing microprocessors, so that technological innovation using FPGAs is required for achieving this target. Accordingly, this FPGA design competition is intended to bring ideas of FPGA researchers together to encourage studies of FPGA technologies necessary for level 5 autonomous driving of the future, and to accelerate the implementation of level 5 autonomous driving.


IMPORTANT DATES (all 23:59, AoE):

– Design Competition Entries Due: September 15
– Design Competition Paper Submission Due: September 15
– Notification of acceptance: September 29
– Final Submission deadline: October 6
– Test run, adjustment, learning, etc.: December, 2018
– Preliminary Round: December, 2018
– Final Round: December, 2018

Design Competition Entry procedure:

You will constitute a team with one or more person(s). The representative of a team is advised to send an e-mail including necessary information, such as a team name and the affiliated institution to design competition chair, Minoru Watanabe. (Email: watanabe.minoru[at]shizuoka.ac.jp. (Substitute @ for [at].))

Design competition paper:

In addition to the entry procedure, each team must submit a paper describing your original contributions on your design. Papers must be submitted electronically in PDF format, following the IEEE style. The submission site will be opened. Papers are allowed a maximum of 4 pages. All accepted papers will appear in the published FPT’18 proceedings and IEEE Xplore. Accepted paper’s team will be invited to the live competition.