4) Design research on devices and circuits for 3D NAND


3D NAND Flash
NAND industry is transitioning technology from planer to 3 dimension (3D). More than 50 U.S.
patents associated with 3D NAND have been issued with my name as (co-)inventor. They are categorized into four areas; 1) array and device structures, 2) control of the array, 3) divided array architecture and 4) array device structures for control circuits. Tier capacitor charge pump was proposed and demonstrated for high area- and power-efficiency (c16a).

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