Recognition

〇 R. Kotsubo was recognized on “Modeling of CMOS Cross-Coupled RF-DC Charge Pump” with Research Encouragement Award at Young CAS Researchers Workshop from IEEE Circuits and Systems Society Japan Joint Chapter in Nov. 2022. Link1, Link2, Link3, Link4, link5
〇T. Hashimoto was recognized on “Highly efficient design of rectenna with antenna and on-chip rectifier for minimizing input power” as the final candidates for Design Award by d.lab-VDEC in Sep. 2022. Link

〇S. Tanabe was recognized on “Design of DC-DC converter for 10X longer battery lifetime with thermoelectric generator” as the final candidates for Design Award by d.lab-VDEC in Sep. 2022. Link

〇Y. Kanayama was recognized on “Proposal of fast operation boost converter for NAND Flash” as the final candidates for Idea Contest by d.lab-VDEC in Sep. 2022. Link
〇T. Kotsubo was recognized on “Proposal of circuit model for low-power RF-DC converter design” as the final candidates for Idea Contest by d.lab-VDEC in Sep. 2022. Link

〇 Dr. Andrea Ballo, Ph. D student at the time when he was a researcher at my lab from June to October of 2019 and now research fellow of the university of Catania in Italy, received the best Ph.D. thesis for the year 2020-2021 from the Società Italiana di Elettronica (“Italian Society for the electronics” in English). Link1, Link2
〇 T. Hashimoto was recognized on “An optimum design of antenna and on-chip rectifier for microwave wireless power transfer” as the final candidates for Design Idea Award by d.lab-VDEC in Sep. 2021. Link
〇 K. Nono was recognized on “A design of low cost power converter with maximum power point tracking for thermoelectric energy harvesting” as the final candidates for Design Idea Award by d.lab-VDEC in Sep. 2021. Link
〇 H. Makino was recognized on “A low power circuit design for NAND Flash memory using 1.2V I/O power supply” as the final candidates for Design Idea Award by d.lab-VDEC in Sep. 2021. Link

〇 T. Nomura received d.lab-VDEC Design Idea Award for “A Proposal of DC/DC Boost Converter Based on Extremely Low-Voltage LC-Resonant Oscillator” in Sep. 2020. Link, Link2

〇 Y. Tabuchi was recognized on “Highly Efficient Circuit Design for Micro-watt Wireless Power Transmission” as the final candidates for Design Idea Award by d.lab-VDEC in Sep. 2020. Link
〇 Y. Sakamoto was recognized on “Power Converter System for Energy Harvesting Toward Zero Net Battery Power” as the final candidates for Design Idea Award by d.lab-VDEC in Sep. 2020. Link
〇 T. Nomura was recognized on “A Proposal of DC/DC Boost Converter Based on Extremely Low-Voltage LC-Resonant Oscillator” as the final candidates for Design Idea Award by d.lab-VDEC in Sep. 2020. Link
〇 K. Matsuyama was recognized as a honor student of Shizuoka university in 2019. Link
〇 K. Matsuyama received VDEC Design Award for “A Pre-Emphasis Pulse Generator for Large Memory and Panel Display Arrays” in Sep. 2019. Link, Link2
〇 H. Kawauchi received VDEC Design Award for “A Fully Integrated Clocked AC-DC voltage multiplier” in Sep. 2019. Link, Link2

〇 K. Matsuyama was recognized on “A Pre-Emphasis Pulse Generator for Large Memory and Panel Display Arrays” as the final candidates for Design Award by VDEC in Jun. 2019. Link
〇 H. Kawauchi was recognized on “A Fully Integrated Clocked AC-DC voltage multiplier” as the final candidates for Design Award by VDEC in Jun. 2019. Link

〇 Y. Tabuchi was recognized on “An Optimum Design of Micro-watt RF Energy Harvesters with RF-DC and DC-DC Conversions” as the final candidates for Design Idea Award by VDEC in Jun. 2019. Link
〇 K. Koketsu was recognized on “An Optimum Design of Thermal Energy Transducers and Power Converters for Small Form-Factor Thermoelectric Energy Harvester” as the final candidates for Design Idea Award by VDEC in Jun. 2019. Link
〇 Y. Ishida was recognized on “A Design of AC-DC Converters Fully Integrated in Standard CMOS for Electrostatic Vibration Energy Harvesting” as the final candidates for Design Idea Award by VDEC in Jun. 2019. Link

〇 H. Kawauchi received VDEC Design Idea Award for “A clocked AC-DC voltage multiplier for increasing the power conversion efficiency in vibration energy harvesting” in Sep. 2018. Link1, Link2, Link3
〇 K. Matsuyama was recognized on “Design of pre-emphasis pulses with minimal RC delay time” as the final candidates for Design Idea Award by VDEC in Jun. 2018. Link

〇 H. Kawauchi was recognized on “A clocked AC-DC voltage multiplier for increasing the power conversion efficiency in vibration energy harvesting” as the final candidates for Design Idea Award by VDEC in Jun. 2018. Link