Contributing to a greener society through innovative researches on integrated circuit design
3D NAND Flash
NAND industry is transitioning technology from planer to 3 dimension (3D). More than 50 U.S. patents associated with 3D NAND have been issued with my name as (co-)inventor. They are categorized into four areas; 1) array and device structures, 2) control of the array, 3) divided array architecture and 4) array device structures for control circuits. Tier capacitor charge pump was proposed and demonstrated for high area- and power-efficiency (c16a).
Design for high reliability
As memory devices and transistors are scaled, process and device variations increases inherently. Circuits and systems designs need to mitigate the variations. In the journal and conference papers (c10a, c10b, c04a, p97a), circuits for error correction, temperature compensation and negative-bias temperature instability (NBTI) for NAND Flash memory are proposed and developed. The error correction circuit reduces the area and peak power significantly so that it can be integrated into NAND die. The temperature compensation circuit for NAND Flash reduces the voltage margins between adjacent threshold levels which have been needed for a conventional circuit. As a result, bit error rate can be reduced when program is made at high temperature and read is made at low temperature or vice versa. The temperature compensation circuit for a voltage-controlled oscillator in 1-chip Bluetooth LSI reduces a frequency drift by intentionally varying the capacitance of variable capacitors. The NBTI mitigation circuit enables to scale high-voltage transistors, i.e., to reduce the decoder circuit area.
Low voltage circuit design
Memory stores the program codes and the data for computing with which processor executes some functions and applications. As the supply voltage for the microprocessor decreases due to scaling transistors, the memory needs to function at low voltage as well. Book (b02a) and papers (p02c, p02a, p01a, p00a, p99b, p97b, c08a) have proposed several low-voltage circuit designs for analog circuits such as sense amps, oscillators, level shifters and charge pumps, and validated them on Si. As a whole set of circuit blocks, 1.5V operation has been confirmed for both NOR and NAND Flash memories.
Building the circuit theory for charge pumps
Charge pump circuits or switched-capacitor voltage multipliers generate high voltages from low supply voltages based on switched capacitors without any inductor. As the supply voltage is reduced for device scaling, it is becoming challenges to design the charge pump circuits with small area and high power conversion efficiency. Books (b15a, b13a) and papers (p17a, p16a, p14a, p12a, p11b, p10b, p10a, p01a, p99b, p97c) contribute to circuit theory on how design and device parameters determine the electrical performance of charge pump circuits and how design parameters should be determined to minimize area, power, or rise time.
Circuits enabling both high performance and low power
To make entire IoT system energy efficient, the data sensed by a sensing device must be filtered so that only data with low entropy can be selectively transmitted into data center. Thus, sampling data would have to be temporally stored in low power non-volatile memory. Fast and power efficient array access minimize energy per bit. We need to find the best way of controlling the neo-volatile memory array. Another area of concern on lower power emerging non-volatile memory is normally-off computing. It aims at reducing power in computing relying on non-volatile switching devices using spin or resistive memory technology. Microprocessor is powered off normally to make stand-by power zero. Right before microprocessor starts running, it is powered up and the data of the internal memories such as registers are loaded down from the non-volatile memory which stores the previous data before power-off and is located closely to the registers. When the stand-by power is the major part of the average power, and when the power for reading (writing) the data from (into) the non-volatile memory is sufficiently low, the system power can be reduced significantly by repeating power- on and off. Consequently, it is a key to design low power sensing and control circuits for the emerging non-volatile memory. We would like to contribute to circuits and systems design in this research area as well.
We have started with research on a closed-form expression for pre-emphasis pulses with minimal RC delay time, which was presented at IEICE general conference in March of 2018.
Animation 1: Much faster pre-charging with pre-emphasis pulses compared with step pulses
Animation 2: Optimum pre-emphasis pulse compared to non-optimum ones
Animation 3: Different waves with different wave numbers vary at each own time constant.
New switching devices and circuit design
Clock frequency of microprocessor has reached the point where power is limited by thermal budget for package with recent extremely scaled CMOS transistors, even though microprocessor runs at 0.5V that is almost the lower bound of CMOS LSI. There are efforts on power reduction at various levels from device to system. In this research theme, we would like to focus on circuit design based on more-than-Moore switching devices for low power. Tunnel and negative conductance transistors have been vastly researched at a device level. Design consideration has just started. We would like to contribute to integrated circuits engineering in this area.
We have started with research on an analysis on lower bounds of supply voltages for enhanced-swing Colpitts oscillators, which was presented at IEICE general conference in March of 2018.
Key circuit for energy harvesting
Energy harvesting powers up Internet-of-Things (IoT) devices to operate autonomously by harvesting power from ambient or extends the battery life for the IoT devices. DC power generated by photovoltaic cells and thermoelectric generators is converted by DC-DC converter. AC power generated by vibration and electromagnetic wave is transformed into DC power by AC-DC converter. Another area of interest in power converter is healthcare. Integrated circuits implemented in human body are better to be powered by wireless power transfer than by battery that needs to be exchanged by surgery. Having sufficiently high power conversion efficiency at extremely low power input is a key of the research. We would like to contribute to circuits and systems design in this research area.
We have started with researches on a minimum-operating-voltage design of DC-DC charge pump circuits for energy harvesting and on a clocked AC-DC voltage multiplier for increasing the power conversion efficiency in vibration energy harvesting, both of which were presented at IEICE general conference in March of 2018. Developed clocked AC/DC charge pump has successfully operated with magnetostrictive energy transducer to generate 4uW at 2V with vibration acceleration of 0.1G.
Animation created by Kawauchi
Measurement of Magnetostrictive vibration energy transducer (0.5Voc-0p/1k-ohm at 0.1G) with Clocked AC/DC multiplier to generate 2uA at 2.0V
